The present invention relates to a power semiconductor having a substrate with an anode disposed on one side of the substrate, a cathode disposed on the opposite side of the substrate, and edge terminations provided on a top side of the substrate.
In the case of power semiconductors, it is necessary to form the components in such a way that they can withstand the voltages that typically accompany high powers. If no forward current flows through the power component, these voltages are dropped entirely across the semiconductor and must accordingly be blocked. In this case, very large field strengths build up between differently doped regions, in particular at the edges of the semiconductor where the edge terminations of the blocking p-n junctions are situated. Reference is made, only by way of example, to U.S. Pat. No. 4,672,738 with regard to the formation of such edge terminations.
If a power semiconductor is intended to block both in the forward direction and in the reverse direction, it is necessary to provide in each case corresponding edge terminations both for the p-n junction that blocks in the forward direction and for the junction that blocks in the reverse direction. In the case of power semiconductors having a very large area, this can be realized by mechanical processing of the edge regions. To that end, the components can be lapped or sand-blasted in order to produce e.g. what are called positive or negative angles which bring about a reduction in the electric field strength in the edge region in the event of blocking voltage loading as a result of widening of the space charge zone.
The mechanical edge termination is not practical with small components because this type of processing results in an excessively high outlay relative to the other fabrication costs and would additionally necessitate going over to a round power semiconductor. Moreover, there are power semiconductors in which comparatively small penetration depths are used at the p-n junctions, for example in insulated gate bipolar transistors (IGBTs). The small penetration depths used there would necessitate very fine mechanical processing. This also largely precludes the use of mechanically produced edge terminations in these components.
In principle, it is possible to provide respective edge terminations on both sides of a planar power semiconductor. However, this is generally undesirable because the realization of an edge termination on the anode side requires comparatively complex passivation and contact-making. A further possibility is to provide the edge terminations only on one side, the top side of the component, and to produce an ohmic connection to the underside via a connection region made of indiffused material. The material used here in the prior art is, by way of example, boron or aluminum, which diffuses more rapidly. The completed semiconductor can be separated, for example by sawing, at the locations at which the aluminum is introduced into the semiconductor during production in order to conductively connect an edge termination on the top side to the underside of the semiconductor. For this reason, a term that is also employed is separation diffusion.
In the prior art, however, the high loading on the semiconductor material is disadvantageous in the fabrication of separation diffusion, the loading being caused by the required diffusion temperatures of around 1240xc2x0 C. and the long drive-in times during which the semiconductor substrate has to be kept at the diffusion temperature. Drive-in times of at least 50 hours are customary even with wafer thicknesses of just 300 micrometers. A further problem associated with the formation of separation diffusion by aluminum is that the latter cannot be masked by silicon dioxide, SiO2. For this reason, in principle no aluminum diffusion is performed, as a rule, in semiconductor production lines for ICs because of the fear in this case that the lack of maskability may lead to cross-contamination in later operation of the production line, for example as a result of impairment of a gate oxide.
It is accordingly an object of the invention to provide a power semiconductor and a fabrication method which overcome the above-mentioned disadvantages of the prior art devices and methods of this general type.
With the foregoing and other objects in view there is provided, in accordance with the invention, a power semiconductor. The power semiconductor contains a substrate having a top side and an underside, an anode disposed on the top side or the underside, a cathode disposed on the other of the top side and the underside, edge terminations disposed on the top side, and at least one doped region disposed in the substrate and extending from one of the edge terminations on the top side to the underside of the substrate. The doped region is continuously sulfur-doped or selenium-doped.
A basic concept of the present invention thus consists in simplifying the formation of edge terminations exclusively on one side of the semiconductor substrate by providing a doped region which is continuous from top to bottom for the purpose of producing an ohmic connection. The region is doped with sulfur or selenium. It has been recognized that such sulfur or selenium doping which extends from an edge termination on the top side to a semiconductor region on the underside has considerable advantages over previously known dopings of separation diffusion regions. Sulfur, in particular, has the advantage that the diffusion rate in silicon is very high, which makes it possible to perform the doping with sulfur by indiffusion at low temperatures and/or for short times. This not only reduces the material loading but also allows economic utilization of production lines and faster fabrication of a semiconductor overall. While selenium also has the n-doping properties that are suitable for the invention, the use of sulfur is preferable for the reason mentioned.
The invention makes it possible to shift all the edge terminations to the top side and nevertheless fabricate the power semiconductor simply and rapidly. Preferably, every edge termination may be formed by a doping, for example as doping with lateral concentration variation as described in U.S. Pat. No. 4,672,738 cited above.
The preferably sulfur-doped or else selenium-doped region is typically provided at an edge of the completed power semiconductor, in order to produce a connection to the underside from an edge termination for the reverse blocking capability. It is possible to form the sulfur-doped or selenium-doped region with a width such that a semiconductor wafer can conveniently be sawn at this location. The sulfur-or selenium-doped region is then situated at a sawing edge. Since the sulfur-doped or selenium-doped region has donor properties, that is to say has n-type conductivity, the lightly doped base zone required for realizing the blocking voltage sought will be correspondingly p-doped. The second, more highly doped base zone will therefore be correspondingly n-doped. Furthermore, in the case of a thyristor structure, the cathodal emitter will be p-doped and the anodal emitter, which is typically situated on the underside, will be n-doped.
Given typical thicknesses and basic dopings of the silicon substrate, it is sufficient for approximately 1014 to 1016 atoms/cm2 to be indiffused as implantation dose into the substrate. The surrounding regions to be protected from the sulfur implantation can be masked with photoresist or silicon dioxide in a simple manner. The masking layer thickness may be 1 micrometer, for example, which suffices from experience. The simple masking allows sulfur or selenium to be driven into the silicon from both substrate sides. In this way, the diffusion time can be reduced to approximately one quarter compared with indiffusion only from one side.
In accordance with an added feature of the invention, the edge terminations are disposed only on the top side.
In accordance with an additional feature of the invention, at least one of the edge terminations is formed by doping with a lateral concentration variation.
In accordance with another feature of the invention, the doped region extends to the edge termination intended for obtaining a reverse blocking capability.
In accordance with a further feature of the invention, the doped region is disposed at a n edge of the power semiconductor.
In accordance with a further added feature of the invention, the substrate has a sawing line defined thereon, and the doped region is disposed at the sawing line of the substrate.
In accordance with a further additional feature of the invention, the doped region extends in a transverse direction by at least twice, three times or four times, a penetration depth of a space charge zone into the doped region.
In accordance with another further feature of the invention, the doped region is doped so highly that an ohmic connection is produced with, in comparison with its surroundings, an appreciable conductivity between the one of the edge terminations and the underside of the substrate.
In accordance with another added feature of the invention, the doped region is formed by indiffusion of an implantation dose of between 1014 and 1016 dopant atoms per square centimeter.
In accordance with another additional feature of the invention, a lightly p-doped base zone is disposed in the substrate.
In accordance with yet another feature of the invention, a more highly doped base zone is n-doped and is disposed in the substrate.
In accordance with a feature of the invention, the cathode is a p-doped cathodal emitter and the anode is an n-doped anodal emitter.
In accordance with yet a further feature of the invention, the edge terminations are disposed on a side of the substrate containing the cathode and the substrate is composed of silicon.
In accordance with a concomitant feature of the invention, all of the edge terminations are formed by doping with a lateral concentration variation.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for fabricating a power semiconductor. The method includes the steps of: providing a substrate being a planar silicon substrate; forming a first power terminal on a top side or an underside of the substrate; forming a second power terminal on the other of the top side and the underside of the substrate; providing edge terminations for both blocking directions on the top side of the substrate; forming a connection connecting a semiconductor region on the underside to an edge termination on the top side; and forming the connection from dopant atoms being either sulfur atoms or selenium atoms indiffused into the substrate.
In accordance with an added mode of the invention, there is the step of indifussing an implantation dose of 1014 to 1016 dopant atoms into the substrate for forming the connection.
In accordance with an additional mode of the invention, there is the step of indifussing the dopant atoms into the substrate from both substrate sides.
In accordance with a further mode of the invention, there is the step of indiffussing the dopant atoms at a temperature below 1240xc2x0 C., in particular below 1200xc2x0 C., and during a time shorter than 50 hours.
In accordance with another mode of the invention, there is the step of masking both of the substrate sides on which the dopant atoms are to be implanted using a masking layer. The masking layer is formed from a material being either silicon dioxide or photoresist.
In accordance with a concomitant mode of the invention, there is the step of stripping off the masking layer before performing the indiffusing step.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a power semiconductor and a fabrication method, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.